SHTF1=0, FACK=0, SLTF=0, TCKSEL=0, SHTF2IE=0, ALERTEN=0, SIICAEN=0, SHTF2=0
I2C SMBus Control and Status register
SHTF2IE | SHTF2 interrupt enable 0 (0): SHTF2 interrupt is disabled 1 (1): SHTF2 interrupt is enabled |
SHTF2 | SCL high timeout flag 2 0 (0): No SCL high and SDA low timeout occurs 1 (1): SCL high and SDA low timeout occurs |
SHTF1 | SCL high timeout flag 1 0 (0): No SCL high and SDA high timeout occurs 1 (1): SCL high and SDA high timeout occurs |
SLTF | SCL low timeout flag 0 (0): No low timeout occurs 1 (1): Low timeout occurs |
TCKSEL | Timeout counter clock select 0 (0): Timeout counter counts at the frequency of the bus clock / 64 1 (1): Timeout counter counts at the frequency of the bus clock |
SIICAEN | Second I2C address enable 0 (0): I2C address register 2 matching is disabled 1 (1): I2C address register 2 matching is enabled |
ALERTEN | SMBus alert response address enable 0 (0): SMBus alert response address matching is disabled 1 (1): SMBus alert response address matching is enabled |
FACK | Fast NACK/ACK enable 0 (0): An ACK or NACK is sent on the following receiving data byte 1 (1): Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving a data byte generates a NACK. |